1. Field of the Invention
The present invention relates to a method of detecting a phase difference, a phase detector for performing the same and a clock and data recovering (CDR) device including the phase detector. More particularly, the present invention relates to a method of detecting a phase difference for reducing jitter while maintaining the operation speed, a phase detector for performing the same and a clock and data recovering device including the phase detector.
2. Description of the Related Art
A bang-bang phase detector is a conventional phase detector for high-speed interface applications. A conventional bang-bang phase detector detects a phase difference between input signals and outputs a phase difference signal having a constant voltage level, regardless of the value of the phase difference.
Therefore, the conventional bang-bang phase detector may detect the phase difference between input signals in a high-speed. In particular, when the phase difference signal has a phase difference lower than 45°, the conventional bang-bang phase detector outputs a phase difference signal having a voltage level that is the same as the voltage level of the phase difference signal having a phase difference higher than 45°. Therefore, when the conventional bang-bang phase detector is used in a clock and data recovery (CDR) circuit, the conventional bang-bang phase detector outputs a phase difference signal having unnecessarily a high voltage level when the phase difference signal has a phase difference lower than 45°, and a pull-in time (or lock time) in a charge pump of the clock and data recovery (CDR) increases, and a jitter characteristic measured in the clock and data recovery (CDR) device using the phase detector may be deteriorated.